In general, most problems during fabrication of polycrystalline silicon (poly-Si) may occur because a process temperature cannot be sufficiently raised to a temperature at which an amorphous silicon (a-Si) thin film is crystallized due to the use of a glass substrate vulnerable to a high temperature.
In the fabrication of poly-Si, the processes that require a high-temperature annealing process may be a crystallization process of changing an a-Si thin film into a crystalline silicon thin film and a dopant activation process including a doping process and an electrical activation process.
Presently, various low-temperature poly-Si (LTPS) processes of forming a poly-Si thin film in a small amount of time at a low temperature allowed by a glass substrate have been proposed. Typical methods of forming poly-Si thin films may include a solid-phase crystallization (SPC) process, an excimer laser annealing (ELA) process, and a metal-induced crystallization (MIC) process.
An SPC process is the most direct and oldest method of forming a poly-Si layer from a-Si. The SPC process may include annealing an a-Si thin film at a temperature of about 600° C. or higher for several tens of hours to form a poly-Si thin film that has crystal grains with a size of about several micrometers. The poly-Si thin film obtained using the SPC process may have a high defect density in the crystal grains, it is difficult to adopt a glass substrate due to a high annealing temperature, and a process time may be increased due to an annealing process with long duration.
An ELA process includes instantaneously irradiating excimer laser beams to an a-Si layer for nano-seconds to melt and recrystallize the a-Si layer without damaging a glass substrate.
However, the ELA process is known to be highly problematic in terms of mass production. In the ELA process, a poly-Si thin film has a very non-uniform grain structure according to laser irradiation. The ELA process, which has a narrow process range, may preclude formation of a uniform crystalline silicon thin film. Also, the poly-Si thin film that has a rough surface may adversely affect device characteristics. This problem may be more serious when the poly-Si layer is applied to an organic light-emitting diode (OLED), which is significantly affected by the uniformity of a thin-film transistor (TFT).
An MIC process was proposed to overcome the above-described problems. The MIC process may include coating a metal catalyst on a-Si using a sputtering process or a spin coating process and inducing crystallization of the a-Si using a low-temperature annealing process. Various metals, such as nickel (Ni), copper (Cu), aluminum (Al), and palladium (Pd), may be used as the metal catalyst. In general, the MIC process may be performed using Ni as the metal catalyst because a reaction may be easily controlled and large grains may be obtained. Although the MIC process may be enabled at a temperature lower than about 450 ° C., the MIC process is quite problematic in terms of actual mass production. Specifically, a considerable amount of metal that diffused into an activation region of a TFT may lead to typical metal contamination, thereby increasing a leakage current, which is a TFT characteristic.
While an LTPS was originally developed in an attempt to apply the LTPS to a liquid crystal display (LCD), the development of the LTPS has been required more and more with the recent introduction of active-matrix organic light-emitting diodes (AMOLEDs) and thin-film poly-Si solar cells.
A method of fabricating a poly-Si thin layer at low cost in high yield may be imperatively required in that AMOLEDs will compete with a-Si TFT LCDs for plenty of display product groups in the market in the near future. In addition, a method of fabricating a poly-Si thin layer may be significantly considered in that AMOLEDs will also compete with crystalline wafers in solar cells. Accordingly, the production cost and marketing competitiveness of products may depend on techniques of fabricating a poly-Si thin layer at lower costs in more stable manners as compared with a-Si TFT LCDs and solar cells including crystalline wafers of which fabrication techniques have come to stabilization stages.
FIG. 1 is a schematic diagram illustrating a conventional process of fabricating a poly-Si thin layer from a-Si using an MIC process. Referring to FIG. 1, in the conventional process, a buffer layer 2 formed of silicon oxide (SiO2) may be formed on a substrate 1, such as a glass substrate, and an a-Si layer 3 may be formed on the buffer layer 2 using a plasma-enhanced chemical vapor deposition (PECVD) process. Then, a metal, such as nickel (Ni), may be coated on the a-Si layer 3 using a sputtering process and annealed using a rapid thermal annealing (RTA) process at a temperature of about 700° C. so that the a-Si layer 3 is crystallized into crystalline silicon 5. However, according to the conventional process, since it is difficult to precisely control the amount of a metal coated on the a-Si layer 3, removing an excessively coated metal may be problematic. The removal of the excessively coated metal may not only lead to an increase in fabrication costs but also detrimentally affect the quality of crystalline silicon.